Dries Claerbout
Digital hardware engineer · FPGA · PCB · AI-assisted development
Experienced digital hardware designer specialising in FPGA designs, with a skill set that extends to PCB design and object-oriented software, and a knack for automating the work around it. Self-employed consultant under the name Clardware since April 2024, with an electronics lab of his own. Works on his own or in a team.
- FPGA design in VHDL
- High-speed PCB design
- Firmware
- Engineering tools and automation
- AI-assisted development with Claude
Education. Master of Electronics, KHBO (2004); Expert VHDL, Doulos (2010); Cadstar high-speed (2016); Altium Designer advanced (2019). Dutch, English and German.
Career
- 2024 –Clardware, Bruges
Self-employed digital hardware engineer. Since 2026 also AI-assisted software and PCB development with Claude.
- 2010 – 2024Airbus Defence & Space (EADS, Cassidian), now Advionics, Oostkamp
VHDL firmware for a radar antenna with 18 FPGAs in three designs; high-speed PCB designs (PCIe, USB 2, HDMI); VHDL and PCB work for nuclear fusion research; the front end of a software-defined radio, two years on site in Munich; an engineering tool in Java that automates SAP, PCB software and reliability calculations (MIL-HDBK-217F).
- 2005 – 2010Mutoh Europe, Ostend
Sole designer of the VHDL firmware for a universal print engine controller, on a Nios II soft core with DDR2 memory; a C++ tool combining AS400 and Cadstar data into reports.
Tools
- VHDL
- Vivado
- Quartus II
- Nios II
- Questasim
- Sigasi
- Altium Designer
- Cadstar
- KiCad
- SPICE
- Java
- C++
- Python
- Rust
- Git
- Claude Code
- MCP
AI-assisted engineering with Claude
Claude Code is part of the daily workflow: specifying, building, testing and documenting, with the engineer keeping the judgement and the final say. In practice:
- A complete desktop application. FamilyTree: about 29,000 lines of Rust, Svelte and TypeScript with on-device AI models, from the first line of code to version 1.0 in ten days (September 2026), checked with automated tests against files from twenty other programs.
- Legacy code brought up to date. Sports Timer: an Android app from 2013 moved from Eclipse to Android Studio and Android 17, then ported to Windows on a shared Java core.
- PCB design over MCP. Claude driving KiCad 10 through the Model Context Protocol, with local, verified component libraries.
- Research agents. Autonomous agents that read a CV or a hardware module and come back with sourced product and market research.
